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The assembly language recognized by lc2asm.js is closely modeled on the one used in Introduction to Computing Systems: from Bits & Gates to C and Beyond by Yale N. Patt and Sanjay J. Patel. Matt Postiff at U Michigan developed a series of notes about the LC-2 which may also be of help.
Decimal numbers can be specified by #123 or 123. Binary number can be specified as %101, b101, or B101. Hexadecimal numbers can be specified as $fade, xfade, Xfade, 0xfade, or 0Xfade. Case is not sensitive.
Note that negative numbers are represented with the base
specifier first, then the sign e.g. #-5
or $-a
.
The LC-2 computer has 8 general purpose registers (R0, R1, ..., R7), and 65535 (0xffff) memory locations. The CPU has a Program Counter (PC), also known as an instruction pointer, whose value is the memory address of the next instruction to be executed. The CPU also has 3 conditional flags: negative, zero, positive; whose values are set to the sign of the result of the previous operation (for some operations).
Memory addresses 0x0000 to 0x0fff are reserved for the Operating System. 0x1000 to 0x2fff, and 0xd000 to 0xefff are reserved. 0xf000 to 0xfbff are reserved for memory mapped I/O. 0xfc00 to 0xffff are reserved for Boot ROM.
Note that the lc2asm.js assembler instructions are not case-sensitive, and differs slightly from the original LC-2 assembler presented in the above book and notes. Line labels must be followed by a colon.
STR1: .STRINGZ "The label on this line is valid." STR2 .STRINGZ "The label on this line is NOT valid."
0x20
0x21
0x22
0x23
0x25
.ORIGIN Loc
Loc
is a memory location which specifies where
the next instruction should be placed in memory, and following
instructions should follow this address accordingly. Without
this directive, the first instruction is placed by default at
0x3000.
.FILL Val
Val
.
.STRINGZ "Str"
Str
is a string of length n. Fill the next n+1
memory locations with the characters of Str, followed by a
zero value.
.BLKW N Val
N
is a number of memory locations. Fills the
next N
memory locations with Val
.
.END
GETC
TRAP $20
.
OUT
TRAP $21
.
PUTS
TRAP $22
.
IN
TRAP $23
.
HALT
TRAP $25
.
ADD Reg_dest, Reg_src1, Reg_src2
Reg_src1
and Reg_src2
and put the result
in Reg_dest
. Sets the conditional flags.
ADD Reg_dest, Reg_src1, Val5
Reg_src1
and the 5-bit value
Val5, and put the result in Reg_dest
. Sets the
conditional flags.
AND Reg_dest, Reg_src1, Reg_src2
Reg_src1
and Reg_src2
and put the result
in Reg_dest
. Sets the conditional flags.
AND Reg_dest, Reg_src1, Val5
Reg_src1
and the
zero-extended 5-bit value Val5
, and put the
result in Reg_dest
. Sets the conditional flags.
NOP
BR Mem9
Mem9
within this
memory page, if nothing. Effectively the same
as NOP
. In fact,
the NOP
assembly instruction is translated
to a BR
with a zero value
for Mem9
.
BRn Mem9
Mem9
within this
memory page, if the negative conditional flag is set.
BRz Mem9
Mem9
within this
memory page, if the zero conditional flag is set.
BRp Mem9
Mem9
within this
memory page, if the positive conditional flag is set.
BRnp Mem9
Mem9
within this
memory page, if the either the negative or positive
conditional flags are set.
BRnz Mem9
Mem9
within this
memory page, if either the negative or zero conditional flags
are set.
BRzp Mem9
Mem9
within this
memory page, if either the zero or positive conditional flags
are set.
BRnzp Mem9
Mem9
within this
memory page (i.e. with the upper 7 bits determined by the
location of this instruction within memory), if the negative,
zero, or positive conditional flags is set. Effectively, this
always jumps since one of the flags is guaranteed to be set
from the last calculation.
JMP Mem9
Mem6
within this
memory page. Effectively the same
as BRnzp
.
JMPR Reg_base, Offset6
Reg_base
to the 6-bit
value Offset6
, and jump to that location in
memory.
JSR Mem9
Mem6
within this
memory page.
JSRR Reg_base, Offset6
Reg_base
to the 6-bit
value Offset6
, and jump to that location in
memory.
LD Reg_dest, Offset9
Offset9
within this memory page and put
it into Reg_dest
.
LDI Reg_dest, Offset9
Offset9
within this memory page, then use
this as a memory address. Retrieve the value at that memory
address and put it into Reg_dest
.
LDR Reg_dest, Reg_base, Offset6
Reg_base
to the 6-bit
value Offset6
, retrieve the value in that memory
location, and store it in Reg_dest
.
LEA Reg_dest, Offset9
Offset6
and store the result
in Reg_dest
.
NOT Reg_dest, Reg_src
Reg_src
and
store it in Reg_dest
.
RET
RTI
ST Reg_src, Offset9
Offset9
within this memory page to the value in Reg_src
.
STI Reg_src, Offset9
Offset9
within this memory page, then use
this as a memory address. Set the value at that memory
address to the value in Reg_src
.
STR Reg_src, Reg_base, Offset6
Reg_base
to the 6-bit
value Offset6
, set the value in that memory
location to the value in Reg_src
.
TRAP vector8
vector8
. This
saves the value of the PC into R7 and sets PC to the value stored at the
zero-extended memory location vector8
. For example, if the
memory address that stores the GETC
subroutine
is 0x0400
, then memory address 0x20
should
store the value 0x400
. Then, TRAP 0x20
will
set the PC to 0x400
.